Searched refs:IS_JSL_EHL (Results 1 – 14 of 14) sorted by relevance
118 drm_WARN_ON(&dev_priv->drm, !IS_JSL_EHL(dev_priv)); in intel_pch_type()130 drm_WARN_ON(&dev_priv->drm, !IS_JSL_EHL(dev_priv)); in intel_pch_type()180 else if (IS_JSL_EHL(dev_priv)) in intel_virt_detect_pch()
609 #define IS_JSL_EHL(dev_priv) (IS_PLATFORM(dev_priv, INTEL_JASPERLAKE) || \ macro702 (IS_JSL_EHL(p) && IS_GRAPHICS_STEP(p, since, until))704 (IS_JSL_EHL(p) && IS_DISPLAY_STEP(p, since, until))
186 } else if (IS_JSL_EHL(i915)) { in intel_step_init()
154 else if (IS_JSL_EHL(i915) || in has_phy_misc()256 if (IS_JSL_EHL(dev_priv)) { in icl_combo_phy_verify_state()350 if (IS_JSL_EHL(dev_priv) && phy == PHY_A) { in icl_combo_phys_init()
213 else if (IS_JSL_EHL(i915) && (pll->info->id == DPLL_ID_EHL_DPLL4)) in intel_combo_pll_enable_reg()3259 } else if (IS_JSL_EHL(dev_priv) && port != PORT_A) { in icl_get_combo_phy_dpll()3600 if (IS_JSL_EHL(dev_priv) && id == DPLL_ID_EHL_DPLL4) { in icl_pll_get_hw_state()3656 if (IS_JSL_EHL(dev_priv) && id == DPLL_ID_EHL_DPLL4) { in icl_dpll_write()3856 if (IS_JSL_EHL(dev_priv) && in combo_pll_enable()3970 if (IS_JSL_EHL(dev_priv) && in combo_pll_disable()4204 else if (IS_JSL_EHL(dev_priv)) in intel_shared_dpll_init()4390 if (IS_JSL_EHL(i915) && pll->on && in readout_dpll_hw_state()
472 if (IS_JSL_EHL(dev_priv) || (DISPLAY_VER(dev_priv) >= 12)) { in gen11_dsi_config_phy_lanes_sequence()629 if (IS_JSL_EHL(dev_priv)) { in gen11_dsi_setup_dphy_timings()
2827 if (IS_JSL_EHL(dev_priv)) { in intel_update_max_cdclk()3212 } else if (IS_JSL_EHL(dev_priv)) { in intel_init_cdclk_hooks()
3222 else if (IS_JSL_EHL(dev_priv) && crtc_state->port_clock > 594000) in intel_ddi_compute_min_voltage_level()4371 } else if (IS_JSL_EHL(dev_priv)) { in intel_ddi_init()4438 else if (IS_JSL_EHL(dev_priv)) in intel_ddi_init()
852 if (IS_JSL_EHL(dev_priv)) { in intel_psr2_config_valid()
2865 else if (IS_JSL_EHL(dev_priv) && HAS_PCH_TGP(dev_priv)) in intel_hdmi_ddc_pin()
2094 else if (IS_JSL_EHL(dev_priv)) in intel_phy_is_combo()2146 else if (IS_JSL_EHL(i915) && port == PORT_D) in intel_port_to_phy()7941 } else if (IS_JSL_EHL(dev_priv)) { in intel_setup_outputs()
480 else if (IS_JSL_EHL(dev_priv)) in intel_dp_set_source_rates()
165 return IS_JSL_EHL(i915); in i915_gem_object_can_bypass_llc()
304 if (IS_JSL_EHL(gt->i915)) in gen11_sseu_info_init()