Searched refs:IS_HASWELL (Results 1 – 25 of 44) sorted by relevance
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33 !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()40 !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()47 !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()55 !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)); in intel_pch_type()191 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in intel_virt_detect_pch()
967 if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()976 if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()1000 } else if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()1012 } else if (IS_HASWELL(engine->i915)) { in intel_engine_init_cmd_parser()1559 if (IS_HASWELL(engine->i915)) in intel_engine_cmd_parser()
600 #define IS_HASWELL(dev_priv) IS_PLATFORM(dev_priv, INTEL_HASWELL) macro637 #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \647 #define IS_HSW_GT3(dev_priv) (IS_HASWELL(dev_priv) && \649 #define IS_HSW_GT1(dev_priv) (IS_HASWELL(dev_priv) && \
253 if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_device_info_subplatform_init()
552 if (!(IS_HASWELL(i915) || IS_BROADWELL(i915) || GRAPHICS_VER(i915) >= 9)) in intel_dram_edram_detect()
2888 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_wm_max_level()2994 if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in ilk_setup_wm_latency()3270 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_wm_lp_latency()3477 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in ilk_write_wm_values()4090 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) in ilk_wm_get_hw_state()4912 else if (IS_HASWELL(dev_priv)) in intel_init_clock_gating_hooks()
106 if (IS_HASWELL(i915) && in hsw_ips_need_disable()148 if (IS_HASWELL(i915) && in hsw_ips_need_enable()261 if (IS_HASWELL(i915)) { in hsw_ips_get_config()
113 if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in i9xx_plane_has_fbc()289 if (!IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv)) { in i9xx_check_plane_surface()302 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i9xx_check_plane_surface()475 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i9xx_plane_update_arm()839 else if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_primary_plane_create()852 if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_primary_plane_create()1022 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in i9xx_get_initial_plane_config()
1170 if (IS_HASWELL(dev_priv)) in assert_can_disable_lcpll()1191 if (IS_HASWELL(dev_priv)) in hsw_read_dcomp()1199 if (IS_HASWELL(dev_priv)) { in hsw_write_dcomp()1895 } else if (IS_BROADWELL(i915) || IS_HASWELL(i915)) { in intel_power_domains_init_hw()2199 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_display_power_suspend_late()2214 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_display_power_resume_early()2231 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_display_power_suspend()2255 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_display_power_resume()
1123 if (IS_IVYBRIDGE(dev_priv) || IS_HASWELL(dev_priv)) in ilk_pfit_enable()1205 (DISPLAY_VER(i915) == 9 || IS_BROADWELL(i915) || IS_HASWELL(i915)); in needs_async_flip_vtd_wa()1983 if (IS_HASWELL(dev_priv) && hsw_workaround_pipe != INVALID_PIPE) { in hsw_crtc_enable()2818 if (IS_HASWELL(dev_priv)) in intel_cpu_transcoder_has_m2_n2()2906 if (IS_HASWELL(dev_priv) && cpu_transcoder == TRANSCODER_EDP && in intel_set_transcoder_timings()2937 IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_pipe_is_interlaced()3423 if (IS_HASWELL(dev_priv) && crtc_state->dither) in hsw_set_transconf()3431 if (IS_HASWELL(dev_priv) && in hsw_set_transconf()4081 if (IS_HASWELL(dev_priv)) { in hsw_get_pipe_config()4116 if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in hsw_get_pipe_config()[all …]
316 if (IS_HASWELL(dev_priv) && in intel_crtc_crc_setup_workarounds()
707 (IS_IVYBRIDGE(dev_priv) || IS_HASWELL(dev_priv)); in ivb_need_sprite_gamma()894 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in ivb_sprite_update_arm()1766 if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { in intel_sprite_plane_create()
714 else if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_dp_aux_init()
312 if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) { in intel_psr_status()1095 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in i915_lpsp_status()1978 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in i915_lpsp_capability_show()
638 if (IS_HASWELL(i915)) { in intel_early_display_was()
935 } else if (DISPLAY_VER(i915) >= 8 || IS_HASWELL(i915)) { in intel_fbc_hw_tracking_covers_screen()1158 if (IS_HASWELL(i915) || IS_BROADWELL(i915)) { in intel_fbc_check_plane()
2200 IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_pixel_rate_to_cdclk()2807 IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) in intel_compute_max_dotclk()3228 } else if (IS_HASWELL(dev_priv)) { in intel_init_cdclk_hooks()
91 } else if (IS_HASWELL(i915)) { in calc_ia_freq()
58 if (IS_HASWELL(i915)) { in batch_get_defaults()391 IS_HASWELL(i915) ? in emit_batch()
801 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in gen6_rps_set()1145 if (IS_HASWELL(i915) || IS_BROADWELL(i915) || in gen6_rps_init()1995 if (GRAPHICS_VER(i915) == 6 || IS_IVYBRIDGE(i915) || IS_HASWELL(i915)) { in intel_rps_init()2052 else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in intel_rps_get_cagf()
39 if (IS_HASWELL(i915)) { in gen7_ppgtt_enable()
694 IS_HASWELL(i915) ? engine->gt->info.num_engines - 1 : 0; in mi_set_context()1186 if (IS_HASWELL(i915)) in setup_rcs()
372 if (IS_HASWELL(i915) || IS_BROADWELL(i915)) in intel_gt_pm_frequency_dump()
656 else if (IS_HASWELL(i915)) in intel_sseu_info_init()
200 else if (IS_HASWELL(rq->engine->i915)) in igt_spinner_create_request()
