Searched refs:IS_ALDERLAKE_S (Results 1 – 22 of 22) sorted by relevance
138 drm_WARN_ON(&dev_priv->drm, !IS_ALDERLAKE_S(dev_priv) && in intel_pch_type()176 else if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) in intel_virt_detect_pch()
614 #define IS_ALDERLAKE_S(dev_priv) IS_PLATFORM(dev_priv, INTEL_ALDERLAKE_S) macro727 (IS_ALDERLAKE_S(__i915) && \731 (IS_ALDERLAKE_S(__i915) && \971 IS_ALDERLAKE_S(dev_priv))
171 } else if (IS_ALDERLAKE_S(i915)) { in intel_step_init()
152 if (IS_ALDERLAKE_S(i915)) in has_phy_misc()221 else if (IS_ALDERLAKE_S(dev_priv)) in phy_is_master()
2194 } else if (IS_ALDERLAKE_S(i915)) { in map_ddc_pin()2452 else if (IS_ALDERLAKE_S(i915)) in dvo_port_to_port()3599 if (IS_ALDERLAKE_S(i915)) in intel_bios_port_aux_ch()3605 if (IS_ALDERLAKE_S(i915)) in intel_bios_port_aux_ch()3615 else if (IS_ALDERLAKE_S(i915)) in intel_bios_port_aux_ch()3625 else if (IS_ALDERLAKE_S(i915)) in intel_bios_port_aux_ch()
2487 IS_TIGERLAKE(i915) || IS_ALDERLAKE_S(i915) || IS_ALDERLAKE_P(i915)) && in ehl_combo_pll_div_frac_wa_needed()3238 if (IS_ALDERLAKE_S(dev_priv)) { in icl_get_combo_phy_dpll()3579 if (IS_ALDERLAKE_S(dev_priv)) { in icl_pll_get_hw_state()3642 if (IS_ALDERLAKE_S(dev_priv)) { in icl_dpll_write()4196 else if (IS_ALDERLAKE_S(dev_priv)) in intel_shared_dpll_init()
912 } else if (IS_ALDERLAKE_S(dev_priv)) { in intel_dmc_ucode_init()
364 if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) { in gen11_dsi_program_esc_clk_div()385 if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) { in gen11_dsi_program_esc_clk_div()
635 else if (IS_ALDERLAKE_S(dev_priv)) in intel_bw_init_hw()
1621 } else if (IS_ALDERLAKE_S(i915)) { in intel_ddi_buf_trans_init()
1577 else if (IS_ALDERLAKE_S(i915)) in intel_display_power_map_init()
1573 if (IS_ALDERLAKE_S(dev_priv) || in tgl_bw_buddy_init()
858 if (IS_ROCKETLAKE(dev_priv) || IS_ALDERLAKE_S(dev_priv) || in intel_psr2_config_valid()
1398 if ((IS_ALDERLAKE_S(dev_priv) || IS_TIGERLAKE(dev_priv)) && in skl_plane_check_fb()
2857 if (IS_ALDERLAKE_S(dev_priv)) in intel_hdmi_ddc_pin()
2090 else if (IS_ALDERLAKE_S(dev_priv)) in intel_phy_is_combo()2142 else if (IS_ALDERLAKE_S(i915) && port >= PORT_TC1) in intel_port_to_phy()7920 } else if (IS_ALDERLAKE_S(dev_priv)) { in intel_setup_outputs()
4356 } else if (IS_ALDERLAKE_S(dev_priv)) { in intel_ddi_init()
477 else if (IS_ALDERLAKE_P(dev_priv) || IS_ALDERLAKE_S(dev_priv) || in intel_dp_set_source_rates()
2253 if (IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || IS_DG1(i915) || in rcs_engine_wa_init()2268 if (IS_ALDERLAKE_P(i915) || IS_DG2(i915) || IS_ALDERLAKE_S(i915) || in rcs_engine_wa_init()2281 if (IS_ALDERLAKE_P(i915) || IS_ALDERLAKE_S(i915) || in rcs_engine_wa_init()2314 IS_ALDERLAKE_S(i915) || IS_ALDERLAKE_P(i915)) { in rcs_engine_wa_init()
1041 IS_ALDERLAKE_S(i915) || in mmio_invalidate_full()
41 if (IS_ALDERLAKE_S(i915) && !IS_ADLS_RPLS(i915)) { in uc_expand_default_options()
497 !IS_ROCKETLAKE(i915) && !IS_ALDERLAKE_S(i915)) { in set_proto_ctx_engines_bond()