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Searched refs:INTF_0 (Results 1 – 8 of 8) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_rm.h29 struct dpu_hw_intf *hw_intf[INTF_MAX - INTF_0];
98 return rm->hw_intf[intf_idx - INTF_0]; in dpu_rm_get_intf()
Ddpu_encoder_phys_vid.c18 (e)->hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__)
24 (e)->hw_intf->idx - INTF_0 : -1, ##__VA_ARGS__)
398 phys_enc->hw_intf->idx - INTF_0, ret, enable, in dpu_encoder_phys_vid_control_vblank_irq()
568 phys_enc->hw_intf->idx - INTF_0, ret); in dpu_encoder_phys_vid_disable()
586 phys_enc->hw_intf->idx - INTF_0); in dpu_encoder_phys_vid_handle_post_kickoff()
600 phys_enc->hw_intf->idx - INTF_0, in dpu_encoder_phys_vid_irq_control()
Ddpu_hw_ctl.c237 case INTF_0: in dpu_hw_ctl_update_pending_flush_intf()
278 ctx->pending_intf_flush_mask |= BIT(intf - INTF_0); in dpu_hw_ctl_update_pending_flush_intf_v1()
540 intf_active |= BIT(cfg->intf - INTF_0); in dpu_hw_ctl_intf_cfg_v1()
618 intf_active &= ~BIT(cfg->intf - INTF_0); in dpu_hw_ctl_reset_intf_cfg_v1()
Ddpu_encoder_phys_cmd.c19 (e) ? (e)->base.intf_idx - INTF_0 : -1, ##__VA_ARGS__)
24 (e) ? (e)->base.intf_idx - INTF_0 : -1, ##__VA_ARGS__)
677 phys_enc->intf_idx - INTF_0); in dpu_encoder_phys_cmd_wait_for_tx_complete()
769 DPU_DEBUG("intf %d\n", p->intf_idx - INTF_0); in dpu_encoder_phys_cmd_init()
Ddpu_hw_catalog.c1241 INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 25, INTF_SDM845_MASK, MDP_SSPP_TOP0_INTR, 24, 25),
1248 INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SDM845_MASK, MDP_SSPP_TOP0_INTR, 24, 25),
1255 …INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, MSM_DP_CONTROLLER_0, 24, INTF_SC7180_MASK, MDP_SSPP_T…
1260 INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, 0, 24, INTF_SC7180_MASK, MDP_SSPP_TOP0_INTR, 24, 25),
1267 …INTF_BLK("intf_0", INTF_0, 0x34000, INTF_DP, MSM_DP_CONTROLLER_0, 24, INTF_SC7280_MASK, MDP_SSPP_T…
1273 …INTF_BLK("intf_0", INTF_0, 0x6A000, INTF_DP, MSM_DP_CONTROLLER_0, 24, INTF_SC7180_MASK, MDP_SSPP_T…
1283 INTF_BLK("intf_0", INTF_0, 0x00000, INTF_NONE, 0, 0, 0, 0, 0, 0),
Ddpu_hw_mdss.h210 INTF_0 = 1, enumerator
Ddpu_rm.c180 if (intf->id < INTF_0 || intf->id >= INTF_MAX) { in dpu_rm_init()
190 rm->hw_intf[intf->id - INTF_0] = hw; in dpu_rm_init()
Ddpu_encoder.c340 phys_enc->intf_idx - INTF_0, phys_enc->wb_idx - WB_0, in dpu_encoder_helper_report_irq_timeout()
2110 phys->intf_idx - INTF_0, phys->wb_idx - WB_0, in _dpu_encoder_status_show()
2344 if (phys->intf_idx >= INTF_0 && phys->intf_idx < INTF_MAX) in dpu_encoder_setup_display()