Searched refs:IMX8ULP_CLK_PLL4_PFD3_DIV2_GATE (Results 1 – 2 of 2) sorted by relevance
87 #define IMX8ULP_CLK_PLL4_PFD3_DIV2_GATE 20 macro
277 …clks[IMX8ULP_CLK_PLL4_PFD3_DIV2_GATE] = imx_clk_hw_gate_dis("pll4_pfd3_div2_gate", "pll4_pfd3", ba… in imx8ulp_clk_cgc2_init()
