Searched refs:I40E_ITR_MASK (Results 1 – 2 of 2) sorted by relevance
19 #define I40E_ITR_MASK 0x1FFE /* mask for ITR register value */ macro25 #define ITR_REG_ALIGN(setting) __ALIGN_MASK(setting, ~I40E_ITR_MASK)
1219 (q_vector->rx.target_itr & I40E_ITR_MASK) == in i40e_update_itr()1239 if ((itr & I40E_ITR_MASK) > I40E_ITR_ADAPTIVE_MAX_USECS) { in i40e_update_itr()1248 itr &= I40E_ITR_MASK; in i40e_update_itr()1263 itr &= I40E_ITR_MASK; in i40e_update_itr()1337 if ((itr & I40E_ITR_MASK) > I40E_ITR_ADAPTIVE_MAX_USECS) { in i40e_update_itr()2593 itr &= I40E_ITR_MASK; in i40e_buildreg_itr()
