Searched refs:HSW_TVIDEO_DIP_CTL (Results 1 – 5 of 5) sorted by relevance
497 MMIO_D(HSW_TVIDEO_DIP_CTL(TRANSCODER_A)); in iterate_generic_mmio()498 MMIO_D(HSW_TVIDEO_DIP_CTL(TRANSCODER_B)); in iterate_generic_mmio()499 MMIO_D(HSW_TVIDEO_DIP_CTL(TRANSCODER_C)); in iterate_generic_mmio()
6222 #define HSW_TVIDEO_DIP_CTL(trans) _MMIO_TRANS2(trans, _HSW_VIDEO_DIP_CTL_A) macro
630 HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder)); in lspcon_infoframes_enabled()
514 i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder); in hsw_write_infoframe()567 HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder)); in hsw_infoframes_enabled()1212 i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder); in hsw_set_infoframes()
3254 i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder); in intel_dp_set_infoframes()
