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Searched refs:HDA_DSP_BAR (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.1/sound/soc/sof/intel/
Dmtl.c25 {"dsp", HDA_DSP_BAR, 0, 0x10000, SOF_DEBUGFS_ACCESS_ALWAYS},
34 snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXTDR, in mtl_ipc_host_done()
39 snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXTDA, in mtl_ipc_host_done()
49 snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXIDA, in mtl_ipc_dsp_done()
53 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXCTL, in mtl_ipc_dsp_done()
64 hfintipptr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_HFINTIPPTR) & MTL_HFINTIPPTR_PTR_MASK; in mtl_dsp_check_ipc_irq()
65 irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, hfintipptr + MTL_DSP_IRQSTS); in mtl_dsp_check_ipc_irq()
82 hfintipptr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, MTL_HFINTIPPTR) & MTL_HFINTIPPTR_PTR_MASK; in mtl_dsp_check_sdw_irq()
83 irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, hfintipptr + MTL_DSP_IRQSTS); in mtl_dsp_check_sdw_irq()
100 snd_sof_dsp_write(sdev, HDA_DSP_BAR, MTL_DSP_REG_HFIPCXIDDY, in mtl_ipc_send_msg()
[all …]
Dcnl.c30 {"dsp", HDA_DSP_BAR, 0, 0x10000, SOF_DEBUGFS_ACCESS_ALWAYS},
43 hipcida = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCIDA); in cnl_ipc4_irq_thread()
46 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, in cnl_ipc4_irq_thread()
54 hipctdr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCTDR); in cnl_ipc4_irq_thread()
57 u32 hipctdd = snd_sof_dsp_read(sdev, HDA_DSP_BAR, in cnl_ipc4_irq_thread()
115 hipcida = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCIDA); in cnl_ipc_irq_thread()
116 hipctdr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCTDR); in cnl_ipc_irq_thread()
117 hipctdd = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCTDD); in cnl_ipc_irq_thread()
118 hipci = snd_sof_dsp_read(sdev, HDA_DSP_BAR, CNL_DSP_REG_HIPCIDR); in cnl_ipc_irq_thread()
128 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, in cnl_ipc_irq_thread()
[all …]
Dhda-loader-skl.c143 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, in cl_skl_cldma_stream_run()
152 val = snd_sof_dsp_read(sdev, HDA_DSP_BAR, in cl_skl_cldma_stream_run()
176 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, in cl_skl_cldma_stream_clear()
179 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, in cl_skl_cldma_stream_clear()
183 snd_sof_dsp_write(sdev, HDA_DSP_BAR, in cl_skl_cldma_stream_clear()
185 snd_sof_dsp_write(sdev, HDA_DSP_BAR, in cl_skl_cldma_stream_clear()
189 snd_sof_dsp_write(sdev, HDA_DSP_BAR, in cl_skl_cldma_stream_clear()
192 snd_sof_dsp_write(sdev, HDA_DSP_BAR, in cl_skl_cldma_stream_clear()
202 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, in cl_skl_cldma_setup_spb()
207 snd_sof_dsp_write(sdev, HDA_DSP_BAR, in cl_skl_cldma_setup_spb()
[all …]
Dhda-ipc.c29 snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, in hda_dsp_ipc_host_done()
35 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, in hda_dsp_ipc_host_done()
47 snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, in hda_dsp_ipc_dsp_done()
53 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, in hda_dsp_ipc_dsp_done()
64 snd_sof_dsp_write(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCI, in hda_dsp_ipc_send_msg()
79 snd_sof_dsp_write(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE, msg_data->extension); in hda_dsp_ipc4_send_msg()
80 snd_sof_dsp_write(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCI, in hda_dsp_ipc4_send_msg()
128 hipcie = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE); in hda_dsp_ipc4_irq_thread()
131 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCCTL, in hda_dsp_ipc4_irq_thread()
138 hipct = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCT); in hda_dsp_ipc4_irq_thread()
[all …]
Dhda-dsp.c46 snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, in hda_dsp_core_reset_enter()
51 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, in hda_dsp_core_reset_enter()
64 adspcs = snd_sof_dsp_read(sdev, HDA_DSP_BAR, in hda_dsp_core_reset_enter()
84 snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, in hda_dsp_core_reset_leave()
91 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, in hda_dsp_core_reset_leave()
105 adspcs = snd_sof_dsp_read(sdev, HDA_DSP_BAR, in hda_dsp_core_reset_leave()
120 snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, in hda_dsp_core_stall_reset()
134 val = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPCS); in hda_dsp_core_is_enabled()
165 snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, in hda_dsp_core_run()
200 snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPCS, in hda_dsp_core_power_up()
[all …]
Dhda.c160 sdw_intel_enable_irq(sdev->bar[HDA_DSP_BAR], enable); in hda_sdw_int_enable()
191 res.mmio_base = sdev->bar[HDA_DSP_BAR]; in hda_sdw_probe()
266 irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS2); in hda_common_check_sdw_irq()
302 snd_sof_dsp_read(sdev, HDA_DSP_BAR, in hda_sdw_check_wakeen_irq()
485 fsr = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg); in hda_dsp_get_state()
526 error_code = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg + 4); in hda_dsp_get_state()
583 value = snd_sof_dsp_read(sdev, HDA_DSP_BAR, chip->rom_status_reg + i * 0x4); in hda_dsp_dump_ext_rom_status()
603 u32 status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_STATUS); in hda_dsp_dump()
604 u32 panic = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_SRAM_REG_FW_TRACEP); in hda_dsp_dump()
636 adspis = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS); in hda_ipc_irq_dump()
[all …]
Dhda-loader.c35 snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, in hda_ssp_set_cbp_cfp()
127 snd_sof_dsp_write(sdev, HDA_DSP_BAR, chip->ipc_req, ipc_hdr); in cl_dsp_init()
140 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, in cl_dsp_init()
156 snd_sof_dsp_update_bits_forced(sdev, HDA_DSP_BAR, in cl_dsp_init()
184 ret = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, in cl_dsp_init()
292 status = snd_sof_dsp_read_poll_timeout(sdev, HDA_DSP_BAR, in hda_cl_copy_fw()
Dicl.c27 {"dsp", HDA_DSP_BAR, 0, 0x10000, SOF_DEBUGFS_ACCESS_ALWAYS},
43 snd_sof_dsp_update_bits_unlocked(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPCS, in icl_dsp_core_stall()
Dskl.c39 {"dsp", HDA_DSP_BAR, 0, 0x10000},
Dapl.c27 {"dsp", HDA_DSP_BAR, 0, 0x10000, SOF_DEBUGFS_ACCESS_ALWAYS},
Dtgl.c22 {"dsp", HDA_DSP_BAR, 0, 0x10000, SOF_DEBUGFS_ACCESS_ALWAYS},
Dhda.h156 #define HDA_DSP_BAR 4 macro