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Searched refs:GCC_PCIE_1_PHY_BCR (Results 1 – 25 of 26) sorted by relevance

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/Linux-v6.1/include/dt-bindings/reset/
Dqcom,gcc-apq8084.h93 #define GCC_PCIE_1_PHY_BCR 84 macro
/Linux-v6.1/include/dt-bindings/clock/
Dqcom,gcc-sc7280.h212 #define GCC_PCIE_1_PHY_BCR 3 macro
Dqcom,gcc-sm8450.h212 #define GCC_PCIE_1_PHY_BCR 12 macro
Dqcom,gcc-sdm845.h230 #define GCC_PCIE_1_PHY_BCR 25 macro
Dqcom,gcc-sm8150.h220 #define GCC_PCIE_1_PHY_BCR 7 macro
Dqcom,gcc-sm8350.h227 #define GCC_PCIE_1_PHY_BCR 12 macro
Dqcom,gcc-sm8250.h224 #define GCC_PCIE_1_PHY_BCR 12 macro
Dqcom,gcc-sc8180x.h257 #define GCC_PCIE_1_PHY_BCR 7 macro
Dqcom,gcc-msm8996.h322 #define GCC_PCIE_1_PHY_BCR 82 macro
Dqcom,gcc-sc8280xp.h411 #define GCC_PCIE_1_PHY_BCR 9 macro
/Linux-v6.1/drivers/clk/qcom/
Dgcc-apq8084.c3565 [GCC_PCIE_1_PHY_BCR] = { 0x1b80 },
Dgcc-sm8450.c3143 [GCC_PCIE_1_PHY_BCR] = { 0x9e01c },
Dgcc-sc7280.c3391 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
Dgcc-sm8250.c3549 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
Dgcc-sm8150.c3737 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
Dgcc-sm8350.c3759 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
Dgcc-msm8996.c3786 [GCC_PCIE_1_PHY_BCR] = { 0x6d038 },
Dgcc-sdm845.c3899 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
Dgcc-sc8180x.c4497 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
Dgcc-sc8280xp.c7269 [GCC_PCIE_1_PHY_BCR] = { 0x8e01c },
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dmsm8996.dtsi628 resets = <&gcc GCC_PCIE_1_PHY_BCR>;
Dsm8450.dtsi1907 resets = <&gcc GCC_PCIE_1_PHY_BCR>;
Dsm8150.dtsi1944 resets = <&gcc GCC_PCIE_1_PHY_BCR>;
Dsm8250.dtsi1987 resets = <&gcc GCC_PCIE_1_PHY_BCR>;
Dsdm845.dtsi2407 resets = <&gcc GCC_PCIE_1_PHY_BCR>;

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