Searched refs:G4X_WM_LEVEL_HPLL (Results 1 – 2 of 2) sorted by relevance
1060 dev_priv->display.wm.pri_latency[G4X_WM_LEVEL_HPLL] = 35; in g4x_setup_wm_latency()1062 dev_priv->display.wm.max_level = G4X_WM_LEVEL_HPLL; in g4x_setup_wm_latency()1099 case G4X_WM_LEVEL_HPLL: in g4x_fbc_fifo_size()1264 crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].plane[plane_id]); in g4x_raw_plane_wm_compute()1270 crtc_state->wm.g4x.raw[G4X_WM_LEVEL_HPLL].fbc); in g4x_raw_plane_wm_compute()1315 if (level <= G4X_WM_LEVEL_HPLL) { in g4x_invalidate_wms()1333 if (level >= G4X_WM_LEVEL_HPLL && in g4x_compute_fbc_en()1334 wm_state->hpll.fbc > g4x_fbc_fifo_size(G4X_WM_LEVEL_HPLL)) in g4x_compute_fbc_en()1388 level = G4X_WM_LEVEL_HPLL; in g4x_compute_pipe_wm()1479 g4x_plane_fifo_size(PLANE_PRIMARY, G4X_WM_LEVEL_HPLL) || in g4x_compute_intermediate_wm()[all …]
875 G4X_WM_LEVEL_HPLL, enumerator
