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Searched refs:EVERGREEN_CRTC4_REGISTER_OFFSET (Results 1 – 8 of 8) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/radeon/
Devergreen_reg.h228 #define EVERGREEN_CRTC4_REGISTER_OFFSET (0x11df0 - 0x6df0) macro
Dradeon_display.c1509 EVERGREEN_CRTC4_REGISTER_OFFSET, in radeon_afmt_init()
1861 EVERGREEN_CRTC4_REGISTER_OFFSET); in radeon_get_crtc_scanoutpos()
1863 EVERGREEN_CRTC4_REGISTER_OFFSET); in radeon_get_crtc_scanoutpos()
Dcik.c6888 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0); in cik_disable_interrupt_state()
6901 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, 0); in cik_disable_interrupt_state()
7240 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, crtc5); in cik_irq_set()
7257 WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, in cik_irq_set()
7309 EVERGREEN_CRTC4_REGISTER_OFFSET); in cik_irq_ack()
7348 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, in cik_irq_ack()
7354 WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VBLANK_ACK); in cik_irq_ack()
7356 WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VLINE_ACK); in cik_irq_ack()
Dradeon_device.c683 reg |= RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET) | in radeon_card_posted()
Devergreen_cs.c1032 EVERGREEN_VLINE_START_END + EVERGREEN_CRTC4_REGISTER_OFFSET, in evergreen_cs_packet_parse_vline()
1040 EVERGREEN_VLINE_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, in evergreen_cs_packet_parse_vline()
Datombios_crtc.c2247 radeon_crtc->crtc_offset = EVERGREEN_CRTC4_REGISTER_OFFSET; in radeon_atombios_init_crtc()
Devergreen.c128 EVERGREEN_CRTC4_REGISTER_OFFSET,
Dsi.c147 EVERGREEN_CRTC4_REGISTER_OFFSET,