| /Linux-v6.1/drivers/gpu/drm/amd/amdgpu/ |
| D | gfxhub_v1_0.c | 178 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 1); in gfxhub_v1_0_init_cache_regs()
364 WREG32_FIELD15(GC, 0, VM_L2_CNTL, ENABLE_L2_CACHE, 0); in gfxhub_v1_0_gart_disable()
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| D | gfxhub_v3_0_3.c | 219 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, ENABLE_L2_CACHE, 1); in gfxhub_v3_0_3_init_cache_regs()
402 WREG32_FIELD15_PREREG(GC, 0, GCVM_L2_CNTL, ENABLE_L2_CACHE, 0); in gfxhub_v3_0_3_gart_disable()
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| D | gfxhub_v2_0.c | 215 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, ENABLE_L2_CACHE, 1); in gfxhub_v2_0_init_cache_regs()
381 WREG32_FIELD15(GC, 0, GCVM_L2_CNTL, ENABLE_L2_CACHE, 0); in gfxhub_v2_0_gart_disable()
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| D | mmhub_v3_0_2.c | 235 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_CACHE, 1); in mmhub_v3_0_2_init_cache_regs()
411 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_CACHE, 0); in mmhub_v3_0_2_gart_disable()
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| D | gfxhub_v3_0.c | 216 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, ENABLE_L2_CACHE, 1); in gfxhub_v3_0_init_cache_regs()
399 WREG32_FIELD15_PREREG(GC, 0, GCVM_L2_CNTL, ENABLE_L2_CACHE, 0); in gfxhub_v3_0_gart_disable()
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| D | mmhub_v3_0_1.c | 236 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_CACHE, 1); in mmhub_v3_0_1_init_cache_regs()
406 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_CACHE, 0); in mmhub_v3_0_1_gart_disable()
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| D | mmhub_v2_0.c | 286 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_CACHE, 1); in mmhub_v2_0_init_cache_regs()
462 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_CACHE, 0); in mmhub_v2_0_gart_disable()
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| D | mmhub_v2_3.c | 210 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_CACHE, 1); in mmhub_v2_3_init_cache_regs()
394 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_CACHE, 0); in mmhub_v2_3_gart_disable()
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| D | mmhub_v3_0.c | 242 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_CACHE, 1); in mmhub_v3_0_init_cache_regs()
418 tmp = REG_SET_FIELD(tmp, MMVM_L2_CNTL, ENABLE_L2_CACHE, 0); in mmhub_v3_0_gart_disable()
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| D | mmhub_v1_0.c | 164 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 1); in mmhub_v1_0_init_cache_regs()
362 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0); in mmhub_v1_0_gart_disable()
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| D | gfxhub_v2_1.c | 218 tmp = REG_SET_FIELD(tmp, GCVM_L2_CNTL, ENABLE_L2_CACHE, 1); in gfxhub_v2_1_init_cache_regs()
401 WREG32_FIELD15(GC, 0, GCVM_L2_CNTL, ENABLE_L2_CACHE, 0); in gfxhub_v2_1_gart_disable()
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| D | gmc_v7_0.c | 637 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 1); in gmc_v7_0_gart_enable()
755 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0); in gmc_v7_0_gart_disable()
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| D | mmhub_v1_7.c | 184 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 1); in mmhub_v1_7_init_cache_regs()
372 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0); in mmhub_v1_7_gart_disable()
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| D | gmc_v8_0.c | 860 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 1); in gmc_v8_0_gart_enable()
995 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL, ENABLE_L2_CACHE, 0); in gmc_v8_0_gart_disable()
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| D | mmhub_v9_4.c | 209 ENABLE_L2_CACHE, 1); in mmhub_v9_4_init_cache_regs()
436 ENABLE_L2_CACHE, 0); in mmhub_v9_4_gart_disable()
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| D | sid.h | 371 #define ENABLE_L2_CACHE (1 << 0) macro
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| /Linux-v6.1/drivers/gpu/drm/radeon/ |
| D | rv770.c | 918 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | in rv770_pcie_gart_enable()
995 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | in rv770_agp_enable()
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| D | rv770d.h | 643 #define ENABLE_L2_CACHE (1 << 0) macro
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| D | nid.h | 105 #define ENABLE_L2_CACHE (1 << 0) macro
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| D | sid.h | 370 #define ENABLE_L2_CACHE (1 << 0) macro
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| D | cikd.h | 488 #define ENABLE_L2_CACHE (1 << 0) macro
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| D | evergreend.h | 1151 #define ENABLE_L2_CACHE (1 << 0) macro
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| D | r600d.h | 588 #define ENABLE_L2_CACHE (1 << 0) macro
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| D | ni.c | 1281 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | in cayman_pcie_gart_enable()
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| D | r600.c | 1142 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | in r600_pcie_gart_enable()
1234 WREG32(VM_L2_CNTL, ENABLE_L2_CACHE | ENABLE_L2_FRAGMENT_PROCESSING | in r600_agp_enable()
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