Searched refs:EMC_XM2CLKPADCTRL (Results 1 – 6 of 6) sorted by relevance
403 0x77fff884 /* EMC_XM2CLKPADCTRL */507 0x77fff884 /* EMC_XM2CLKPADCTRL */611 0x77fff884 /* EMC_XM2CLKPADCTRL */715 0x77fff884 /* EMC_XM2CLKPADCTRL */817 0x77fff884 /* EMC_XM2CLKPADCTRL */920 0x77fff884 /* EMC_XM2CLKPADCTRL */1028 0x77fff884 /* EMC_XM2CLKPADCTRL */1132 0x77fff884 /* EMC_XM2CLKPADCTRL */1236 0x77fff884 /* EMC_XM2CLKPADCTRL */1340 0x77fff884 /* EMC_XM2CLKPADCTRL */[all …]
98 0x77fff884 /* EMC_XM2CLKPADCTRL */202 0x77fff884 /* EMC_XM2CLKPADCTRL */305 0x77fff884 /* EMC_XM2CLKPADCTRL */
1273 0x77ffc081 /* EMC_XM2CLKPADCTRL */1441 0x77ffc081 /* EMC_XM2CLKPADCTRL */1609 0x77ffc081 /* EMC_XM2CLKPADCTRL */1777 0x77ffc081 /* EMC_XM2CLKPADCTRL */1945 0x77ffc081 /* EMC_XM2CLKPADCTRL */2113 0x77ffc081 /* EMC_XM2CLKPADCTRL */2281 0x77ffc081 /* EMC_XM2CLKPADCTRL */2449 0x77ffc081 /* EMC_XM2CLKPADCTRL */2617 0x77ffc085 /* EMC_XM2CLKPADCTRL */2785 0x77ffc085 /* EMC_XM2CLKPADCTRL */[all …]
2730 0x77fff884 /* EMC_XM2CLKPADCTRL */2832 0x77fff884 /* EMC_XM2CLKPADCTRL */2934 0x77fff884 /* EMC_XM2CLKPADCTRL */3036 0x77fff884 /* EMC_XM2CLKPADCTRL */3136 0x77fff884 /* EMC_XM2CLKPADCTRL */3237 0x77fff884 /* EMC_XM2CLKPADCTRL */3343 0x77fff884 /* EMC_XM2CLKPADCTRL */3445 0x77fff884 /* EMC_XM2CLKPADCTRL */3547 0x77fff884 /* EMC_XM2CLKPADCTRL */3649 0x77fff884 /* EMC_XM2CLKPADCTRL */[all …]
110 #define EMC_XM2CLKPADCTRL 0x308 macro312 [73] = EMC_XM2CLKPADCTRL,716 writel_relaxed(timing->data[73], emc->regs + EMC_XM2CLKPADCTRL); in emc_prepare_timing_change()
165 #define EMC_XM2CLKPADCTRL 0x308 macro424 EMC_XM2CLKPADCTRL,
