Searched refs:EFX_MAX_CHANNELS (Results 1 – 14 of 14) sorted by relevance
35 int eventq_dma[EFX_MAX_CHANNELS];36 int eventq_int[EFX_MAX_CHANNELS];
55 #define EFX_MAX_CHANNELS 32U macro56 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS65 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)72 #define EFX_MAX_TX_QUEUES (EFX_MAX_TXQ_PER_CHANNEL * EFX_MAX_CHANNELS)1029 struct efx_channel *channel[EFX_MAX_CHANNELS];1030 struct efx_msi_context msi_context[EFX_MAX_CHANNELS];
73 DECLARE_BITMAP(evq_phases, EFX_MAX_CHANNELS);
260 struct msix_entry xentries[EFX_MAX_CHANNELS]; in efx_probe_interrupts()566 for (i = 0; i < EFX_MAX_CHANNELS; i++) { in efx_init_channels()578 efx->max_channels = EFX_MAX_CHANNELS; in efx_init_channels()579 efx->max_tx_channels = EFX_MAX_CHANNELS; in efx_init_channels()588 for (i = 0; i < EFX_MAX_CHANNELS; i++) in efx_fini_channels()847 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel, in efx_realloc_channels()
177 unsigned int read_ptr[EFX_MAX_CHANNELS]; in efx_test_eventq_irq()181 BUILD_BUG_ON(EFX_MAX_CHANNELS > BITS_PER_LONG); in efx_test_eventq_irq()
2036 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS)); in efx_mcdi_flush_rxqs()2039 BUILD_BUG_ON(EFX_MAX_CHANNELS > in efx_mcdi_flush_rxqs()
617 efx->max_channels = min_t(unsigned int, EFX_MAX_CHANNELS, in efx_ef10_probe()
55 #define EFX_MAX_CHANNELS 32U macro56 #define EFX_MAX_RX_QUEUES EFX_MAX_CHANNELS65 #define EFX_MAX_CORE_TX_QUEUES (EFX_MAX_TX_TC * EFX_MAX_CHANNELS)72 #define EFX_MAX_TX_QUEUES (EFX_MAX_TXQ_PER_CHANNEL * EFX_MAX_CHANNELS)976 struct efx_channel *channel[EFX_MAX_CHANNELS];977 struct efx_msi_context msi_context[EFX_MAX_CHANNELS];
261 struct msix_entry xentries[EFX_MAX_CHANNELS]; in efx_siena_probe_interrupts()568 for (i = 0; i < EFX_MAX_CHANNELS; i++) { in efx_siena_init_channels()580 efx->max_channels = EFX_MAX_CHANNELS; in efx_siena_init_channels()581 efx->max_tx_channels = EFX_MAX_CHANNELS; in efx_siena_init_channels()590 for (i = 0; i < EFX_MAX_CHANNELS; i++) in efx_siena_fini_channels()856 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel; in efx_siena_realloc_channels()
282 efx->max_channels = EFX_MAX_CHANNELS; in siena_probe_nic()283 efx->max_vis = EFX_MAX_CHANNELS; in siena_probe_nic()284 efx->max_tx_channels = EFX_MAX_CHANNELS; in siena_probe_nic()
1981 MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS)); in efx_siena_mcdi_flush_rxqs()1984 BUILD_BUG_ON(EFX_MAX_CHANNELS > in efx_siena_mcdi_flush_rxqs()
1295 BUILD_BUG_ON(EFX_MAX_CHANNELS + 1 >= EFX_VI_BASE); in efx_siena_sriov_init()
