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Searched refs:DSCC1_DSCC_PPS_CONFIG1__VBR_ENABLE__SHIFT (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h22888 #define DSCC1_DSCC_PPS_CONFIG1__VBR_ENABLE__SHIFT … macro
Ddcn_2_1_0_sh_mask.h45009 #define DSCC1_DSCC_PPS_CONFIG1__VBR_ENABLE__SHIFT … macro
Ddcn_3_2_1_sh_mask.h42438 #define DSCC1_DSCC_PPS_CONFIG1__VBR_ENABLE__SHIFT … macro
Ddcn_3_0_1_sh_mask.h38245 #define DSCC1_DSCC_PPS_CONFIG1__VBR_ENABLE__SHIFT … macro
Ddcn_3_1_5_sh_mask.h45483 #define DSCC1_DSCC_PPS_CONFIG1__VBR_ENABLE__SHIFT … macro
Ddcn_3_1_2_sh_mask.h47202 #define DSCC1_DSCC_PPS_CONFIG1__VBR_ENABLE__SHIFT … macro
Ddcn_3_0_2_sh_mask.h44272 #define DSCC1_DSCC_PPS_CONFIG1__VBR_ENABLE__SHIFT … macro
Ddcn_3_1_6_sh_mask.h48829 #define DSCC1_DSCC_PPS_CONFIG1__VBR_ENABLE__SHIFT … macro
Ddcn_3_1_4_sh_mask.h49541 #define DSCC1_DSCC_PPS_CONFIG1__VBR_ENABLE__SHIFT … macro
Ddcn_3_0_0_sh_mask.h50904 #define DSCC1_DSCC_PPS_CONFIG1__VBR_ENABLE__SHIFT … macro
Ddcn_2_0_0_sh_mask.h51576 #define DSCC1_DSCC_PPS_CONFIG1__VBR_ENABLE__SHIFT … macro
Ddcn_3_2_0_sh_mask.h42390 #define DSCC1_DSCC_PPS_CONFIG1__VBR_ENABLE__SHIFT … macro