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Searched refs:DP_AUX_CH_CTL (Results 1 – 5 of 5) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/i915/display/
Dintel_dp_aux.c492 return DP_AUX_CH_CTL(aux_ch); in g4x_aux_ctl_reg()
495 return DP_AUX_CH_CTL(AUX_CH_B); in g4x_aux_ctl_reg()
524 return DP_AUX_CH_CTL(aux_ch); in ilk_aux_ctl_reg()
531 return DP_AUX_CH_CTL(AUX_CH_A); in ilk_aux_ctl_reg()
567 return DP_AUX_CH_CTL(aux_ch); in skl_aux_ctl_reg()
570 return DP_AUX_CH_CTL(AUX_CH_A); in skl_aux_ctl_reg()
610 return DP_AUX_CH_CTL(aux_ch); in tgl_aux_ctl_reg()
613 return DP_AUX_CH_CTL(AUX_CH_A); in tgl_aux_ctl_reg()
Dintel_display_power_well.c508 val = intel_de_read(dev_priv, DP_AUX_CH_CTL(aux_ch)); in icl_tc_phy_aux_power_well_enable()
512 intel_de_write(dev_priv, DP_AUX_CH_CTL(aux_ch), val); in icl_tc_phy_aux_power_well_enable()
/Linux-v6.1/drivers/gpu/drm/i915/gvt/
Dhandlers.c1073 if (reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_A))) in trigger_aux_channel_interrupt()
1076 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_B))) in trigger_aux_channel_interrupt()
1079 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_C))) in trigger_aux_channel_interrupt()
1082 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_D))) in trigger_aux_channel_interrupt()
2583 MMIO_F(DP_AUX_CH_CTL(AUX_CH_B), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL, in init_skl_mmio_info()
2585 MMIO_F(DP_AUX_CH_CTL(AUX_CH_C), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL, in init_skl_mmio_info()
2587 MMIO_F(DP_AUX_CH_CTL(AUX_CH_D), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL, in init_skl_mmio_info()
/Linux-v6.1/drivers/gpu/drm/i915/
Dintel_gvt_mmio_table.c900 MMIO_F(DP_AUX_CH_CTL(AUX_CH_B), 6 * 4); in iterate_skl_plus_mmio()
901 MMIO_F(DP_AUX_CH_CTL(AUX_CH_C), 6 * 4); in iterate_skl_plus_mmio()
902 MMIO_F(DP_AUX_CH_CTL(AUX_CH_D), 6 * 4); in iterate_skl_plus_mmio()
Di915_reg.h3463 #define DP_AUX_CH_CTL(aux_ch) _MMIO_PORT(aux_ch, _DPA_AUX_CH_CTL, _DPB_AUX_CH_CTL) macro