Home
last modified time | relevance | path

Searched refs:DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT (Results 1 – 16 of 16) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h5808 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT 0x0000001c macro
Ddce_8_0_sh_mask.h7970 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT 0x1c macro
Ddce_10_0_sh_mask.h6998 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT 0x1c macro
Ddce_11_0_sh_mask.h6900 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT 0x1c macro
Ddce_11_2_sh_mask.h7972 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT 0x1c macro
Ddce_12_0_sh_mask.h4864 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h1514 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT macro
Ddcn_2_1_0_sh_mask.h2336 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT macro
Ddcn_3_0_1_sh_mask.h2477 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT macro
Ddcn_1_0_sh_mask.h3830 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT macro
Ddcn_3_1_2_sh_mask.h1961 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT macro
Ddcn_3_0_2_sh_mask.h2407 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT macro
Ddcn_3_1_6_sh_mask.h2528 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT macro
Ddcn_3_1_4_sh_mask.h10591 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT macro
Ddcn_3_0_0_sh_mask.h2473 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT macro
Ddcn_2_0_0_sh_mask.h2604 #define DMCU_INTERRUPT_STATUS__VBLANK5_INT_CLEAR__SHIFT macro