Searched refs:DKL_PLL_BIAS (Results 1 – 2 of 2) sorted by relevance
3545 hw_state->mg_pll_bias = intel_dkl_phy_read(dev_priv, DKL_PLL_BIAS(tc_port), 2); in dkl_pll_get_hw_state()3777 val = intel_dkl_phy_read(dev_priv, DKL_PLL_BIAS(tc_port), 2); in dkl_pll_write()3781 intel_dkl_phy_write(dev_priv, DKL_PLL_BIAS(tc_port), 2, val); in dkl_pll_write()
7479 #define DKL_PLL_BIAS(tc_port) _MMIO(_PORT(tc_port, _DKL_PHY1_BASE, \ macro
