Searched refs:DKL_CMN_UC_DW_27 (Results 1 – 2 of 2) sorted by relevance
534 if (wait_for(intel_dkl_phy_read(dev_priv, DKL_CMN_UC_DW_27(tc_port), 2) & in icl_tc_phy_aux_power_well_enable()
7577 #define DKL_CMN_UC_DW_27(tc_port) _MMIO(_PORT(tc_port, \ macro