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Searched refs:DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT_MASK (Results 1 – 13 of 13) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_3_sh_mask.h487 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT_MASK … macro
Ddcn_3_0_3_sh_mask.h2538 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT_MASK … macro
Ddcn_2_1_0_sh_mask.h3689 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT_MASK … macro
Ddcn_3_2_1_sh_mask.h1187 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT_MASK … macro
Ddcn_3_0_1_sh_mask.h3903 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT_MASK … macro
Ddcn_1_0_sh_mask.h4971 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT_MASK … macro
Ddcn_3_1_2_sh_mask.h3661 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT_MASK … macro
Ddcn_3_0_2_sh_mask.h3870 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT_MASK … macro
Ddcn_3_1_6_sh_mask.h4230 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT_MASK … macro
Ddcn_3_1_4_sh_mask.h12026 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT_MASK … macro
Ddcn_3_0_0_sh_mask.h3973 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT_MASK … macro
Ddcn_2_0_0_sh_mask.h3957 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT_MASK … macro
Ddcn_3_2_0_sh_mask.h1189 #define DISP_INTERRUPT_STATUS__OTG1_IHC_TRIGA_INTERRUPT_MASK … macro