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Searched refs:DISP_CC_MDSS_VSYNC_CLK (Results 1 – 25 of 25) sorted by relevance

/Linux-v6.1/include/dt-bindings/clock/
Dqcom,dispcc-qcm2290.h25 #define DISP_CC_MDSS_VSYNC_CLK 15 macro
Dqcom,sm6115-dispcc.h28 #define DISP_CC_MDSS_VSYNC_CLK 18 macro
Dqcom,dispcc-sm6125.h34 #define DISP_CC_MDSS_VSYNC_CLK 25 macro
Dqcom,dispcc-sc7180.h39 #define DISP_CC_MDSS_VSYNC_CLK 30 macro
Dqcom,dispcc-sm6350.h40 #define DISP_CC_MDSS_VSYNC_CLK 29 macro
Dqcom,dispcc-sdm845.h33 #define DISP_CC_MDSS_VSYNC_CLK 23 macro
Dqcom,dispcc-sc7280.h47 #define DISP_CC_MDSS_VSYNC_CLK 37 macro
Dqcom,dispcc-sm8150.h54 #define DISP_CC_MDSS_VSYNC_CLK 44 macro
Dqcom,dispcc-sm8250.h54 #define DISP_CC_MDSS_VSYNC_CLK 44 macro
Dqcom,dispcc-sm8350.h54 #define DISP_CC_MDSS_VSYNC_CLK 44 macro
Dqcom,sm8450-dispcc.h85 #define DISP_CC_MDSS_VSYNC_CLK 75 macro
/Linux-v6.1/drivers/clk/qcom/
Ddispcc-qcm2290.c482 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
Ddispcc-sm6115.c547 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
Ddispcc-sc7180.c671 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
Ddispcc-sm6125.c643 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
Ddispcc-sm6350.c730 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
Ddispcc-sdm845.c810 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
Ddispcc-sc7280.c839 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
Ddispcc-sm8250.c1197 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
Ddispcc-sm8450.c1721 [DISP_CC_MDSS_VSYNC_CLK] = &disp_cc_mdss_vsync_clk.clkr,
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsm8250-sony-xperia-edo.dtsi40 <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
Dsc7180.dtsi2925 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
2928 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>,
Dsdm845.dtsi4469 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
4472 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
Dsm8250.dtsi3475 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
3478 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
Dsc7280.dtsi3836 <&dispcc DISP_CC_MDSS_VSYNC_CLK>;
3843 assigned-clocks = <&dispcc DISP_CC_MDSS_VSYNC_CLK>,