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Searched refs:DIDT_TD_CTRL0__PHASE_OFFSET_MASK (Results 1 – 11 of 11) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_powertune.c187 …{ ixDIDT_TD_CTRL0, DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD…
329 …{ ixDIDT_TD_CTRL0, DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD…
471 …{ ixDIDT_TD_CTRL0, DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD…
615 …{ ixDIDT_TD_CTRL0, DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD…
799 …{ ixDIDT_TD_CTRL0, DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD…
Dvega10_powertune.c224 …{ ixDIDT_TD_CTRL0, DIDT_TD_CTRL0__PHASE_OFFSET_MASK, DIDT_TD_CTRL0__PHASE_OFF…
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h18359 #define DIDT_TD_CTRL0__PHASE_OFFSET_MASK 0xc macro
Dgfx_8_0_sh_mask.h20597 #define DIDT_TD_CTRL0__PHASE_OFFSET_MASK 0xc macro
Dgfx_8_1_sh_mask.h21203 #define DIDT_TD_CTRL0__PHASE_OFFSET_MASK 0xc macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h29233 #define DIDT_TD_CTRL0__PHASE_OFFSET_MASK … macro
Dgc_9_1_sh_mask.h30444 #define DIDT_TD_CTRL0__PHASE_OFFSET_MASK … macro
Dgc_9_2_1_sh_mask.h30718 #define DIDT_TD_CTRL0__PHASE_OFFSET_MASK … macro
Dgc_9_4_2_sh_mask.h532 #define DIDT_TD_CTRL0__PHASE_OFFSET_MASK … macro
Dgc_10_1_0_sh_mask.h43491 #define DIDT_TD_CTRL0__PHASE_OFFSET_MASK … macro
Dgc_10_3_0_sh_mask.h48765 #define DIDT_TD_CTRL0__PHASE_OFFSET_MASK … macro