Searched refs:DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_MASK (Results 1 – 2 of 2) sorted by relevance
1553 DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(phy), in dg1_ddi_enable_clock()1584 val &= DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(phy); in dg1_ddi_get_pll()
7254 #define DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(phy) (0x3 << DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(phy)) macro
