Searched refs:DG1_DPCLKA_CFGCR0 (Results 1 – 2 of 2) sorted by relevance
1552 _icl_ddi_enable_clock(i915, DG1_DPCLKA_CFGCR0(phy), in dg1_ddi_enable_clock()1563 _icl_ddi_disable_clock(i915, DG1_DPCLKA_CFGCR0(phy), in dg1_ddi_disable_clock()1572 return _icl_ddi_is_clock_enabled(i915, DG1_DPCLKA_CFGCR0(phy), in dg1_ddi_is_clock_enabled()1583 val = intel_de_read(i915, DG1_DPCLKA_CFGCR0(phy)); in dg1_ddi_get_pll()
7248 #define DG1_DPCLKA_CFGCR0(phy) _MMIO_PHY((phy) / 2, \ macro
