Searched refs:DDR3PHY_DXCCR (Results 1 – 2 of 2) sorted by relevance
37 #define DDR3PHY_DXCCR (0x28) /* DDR3PHY DATX8 Common Configuration Register */ macro
192 ldr tmp1, [r3, #DDR3PHY_DXCCR]194 str tmp1, [r3, #DDR3PHY_DXCCR]219 ldr tmp1, [r3, #DDR3PHY_DXCCR]221 str tmp1, [r3, #DDR3PHY_DXCCR]
