Searched refs:DDI_CLK_SEL_MASK (Results 1 – 2 of 2) sorted by relevance
7067 #define DDI_CLK_SEL_MASK REG_GENMASK(31, 28) macro7068 #define DDI_CLK_SEL_NONE REG_FIELD_PREP(DDI_CLK_SEL_MASK, 0x0)7069 #define DDI_CLK_SEL_MG REG_FIELD_PREP(DDI_CLK_SEL_MASK, 0x8)7070 #define DDI_CLK_SEL_TBT_162 REG_FIELD_PREP(DDI_CLK_SEL_MASK, 0xC)7071 #define DDI_CLK_SEL_TBT_270 REG_FIELD_PREP(DDI_CLK_SEL_MASK, 0xD)7072 #define DDI_CLK_SEL_TBT_540 REG_FIELD_PREP(DDI_CLK_SEL_MASK, 0xE)7073 #define DDI_CLK_SEL_TBT_810 REG_FIELD_PREP(DDI_CLK_SEL_MASK, 0xF)
309 u32 val = intel_de_read(dev_priv, DDI_CLK_SEL(port)) & DDI_CLK_SEL_MASK; in icl_calc_tbt_pll_link()1680 if ((tmp & DDI_CLK_SEL_MASK) == DDI_CLK_SEL_NONE) in jsl_ddi_tc_is_clock_enabled()1733 if ((tmp & DDI_CLK_SEL_MASK) == DDI_CLK_SEL_NONE) in icl_ddi_tc_is_clock_enabled()1751 switch (tmp & DDI_CLK_SEL_MASK) { in icl_ddi_tc_get_pll()
