Searched refs:CS42L42_PLL_DIV_INT (Results 1 – 3 of 3) sorted by relevance
65 { CS42L42_PLL_DIV_INT, 0x40 },
95 { CS42L42_PLL_DIV_INT, 0x40 },246 case CS42L42_PLL_DIV_INT: in cs42l42_readable_register()727 CS42L42_PLL_DIV_INT, in cs42l42_pll_config()
492 #define CS42L42_PLL_DIV_INT (CS42L42_PAGE_15 + 0x05) macro