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Searched refs:CP_PFP_LOAD_CONTROL__CNTX_REG_EN__SHIFT (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h2681 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN__SHIFT 0x00000001 macro
Dgfx_7_2_sh_mask.h2774 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN__SHIFT 0x1 macro
Dgfx_8_0_sh_mask.h3344 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN__SHIFT 0x1 macro
Dgfx_8_1_sh_mask.h3866 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN__SHIFT 0x1 macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h19557 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN__SHIFT … macro
Dgc_9_1_sh_mask.h20868 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN__SHIFT … macro
Dgc_9_2_1_sh_mask.h20795 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN__SHIFT … macro
Dgc_9_4_2_sh_mask.h13022 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN__SHIFT … macro
Dgc_11_0_0_sh_mask.h26912 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN__SHIFT … macro
Dgc_10_1_0_sh_mask.h27357 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN__SHIFT … macro
Dgc_11_0_3_sh_mask.h29416 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN__SHIFT … macro
Dgc_10_3_0_sh_mask.h25687 #define CP_PFP_LOAD_CONTROL__CNTX_REG_EN__SHIFT … macro