Home
last modified time | relevance | path

Searched refs:CP_MEC_CNTL__MEC_ME2_HALT_MASK (Results 1 – 15 of 15) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Dgfx_v7_0.c2670 CP_MEC_CNTL__MEC_ME2_HALT_MASK)); in gfx_v7_0_cp_compute_enable()
4658 WREG32(mmCP_MEC_CNTL, CP_MEC_CNTL__MEC_ME1_HALT_MASK | CP_MEC_CNTL__MEC_ME2_HALT_MASK); in gfx_v7_0_soft_reset()
Dgfx_v10_0.c6288 CP_MEC_CNTL__MEC_ME2_HALT_MASK)); in gfx_v10_0_cp_compute_enable()
6293 CP_MEC_CNTL__MEC_ME2_HALT_MASK)); in gfx_v10_0_cp_compute_enable()
Dgfx_v9_0.c3192 (CP_MEC_CNTL__MEC_ME1_HALT_MASK | CP_MEC_CNTL__MEC_ME2_HALT_MASK)); in gfx_v9_0_cp_compute_enable()
Dgfx_v8_0.c4321 WREG32(mmCP_MEC_CNTL, (CP_MEC_CNTL__MEC_ME1_HALT_MASK | CP_MEC_CNTL__MEC_ME2_HALT_MASK)); in gfx_v8_0_cp_compute_enable()
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h2221 #define CP_MEC_CNTL__MEC_ME2_HALT_MASK 0x10000000 macro
Dgfx_8_0_sh_mask.h2767 #define CP_MEC_CNTL__MEC_ME2_HALT_MASK 0x10000000 macro
Dgfx_8_1_sh_mask.h3289 #define CP_MEC_CNTL__MEC_ME2_HALT_MASK 0x10000000 macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h846 #define CP_MEC_CNTL__MEC_ME2_HALT_MASK … macro
Dgc_9_1_sh_mask.h745 #define CP_MEC_CNTL__MEC_ME2_HALT_MASK … macro
Dgc_9_2_1_sh_mask.h734 #define CP_MEC_CNTL__MEC_ME2_HALT_MASK … macro
Dgc_9_4_2_sh_mask.h1367 #define CP_MEC_CNTL__MEC_ME2_HALT_MASK … macro
Dgc_11_0_0_sh_mask.h23994 #define CP_MEC_CNTL__MEC_ME2_HALT_MASK … macro
Dgc_10_1_0_sh_mask.h6325 #define CP_MEC_CNTL__MEC_ME2_HALT_MASK … macro
Dgc_11_0_3_sh_mask.h26344 #define CP_MEC_CNTL__MEC_ME2_HALT_MASK … macro
Dgc_10_3_0_sh_mask.h6898 #define CP_MEC_CNTL__MEC_ME2_HALT_MASK … macro