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Searched refs:CP_INT_CNTL__PRIV_REG_INT_ENABLE_MASK (Results 1 – 12 of 12) sorted by relevance

/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h2358 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE_MASK 0x00800000L macro
Dgfx_7_2_sh_mask.h1157 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE_MASK 0x800000 macro
Dgfx_8_0_sh_mask.h1479 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE_MASK 0x800000 macro
Dgfx_8_1_sh_mask.h2003 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE_MASK 0x800000 macro
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h10775 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE_MASK … macro
Dgc_9_1_sh_mask.h12256 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE_MASK … macro
Dgc_9_2_1_sh_mask.h12060 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE_MASK … macro
Dgc_9_4_2_sh_mask.h2076 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE_MASK … macro
Dgc_11_0_0_sh_mask.h15201 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE_MASK … macro
Dgc_10_1_0_sh_mask.h17695 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE_MASK … macro
Dgc_11_0_3_sh_mask.h17356 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE_MASK … macro
Dgc_10_3_0_sh_mask.h15955 #define CP_INT_CNTL__PRIV_REG_INT_ENABLE_MASK … macro