Searched refs:CPU_ID_SCHED_ARC5 (Results 1 – 2 of 2) sorted by relevance
21 #define CPU_ID_SCHED_ARC5 5 /* DCORE3_MME0 */ macro
980 [CPU_ID_SCHED_ARC5] = mmDCORE3_MME_QM_ARC_AUX_BASE,1052 [CPU_ID_SCHED_ARC5] = mmDCORE3_MME_QM_ARC_DCCM_BASE,1254 [GAUDI2_QUEUE_ID_DCORE3_MME_0_0] = CPU_ID_SCHED_ARC5,1255 [GAUDI2_QUEUE_ID_DCORE3_MME_0_1] = CPU_ID_SCHED_ARC5,1256 [GAUDI2_QUEUE_ID_DCORE3_MME_0_2] = CPU_ID_SCHED_ARC5,1257 [GAUDI2_QUEUE_ID_DCORE3_MME_0_3] = CPU_ID_SCHED_ARC5,2672 case CPU_ID_SCHED_ARC5: in gaudi2_scrub_arc_dccm()5735 case CPU_ID_SCHED_ARC0 ... CPU_ID_SCHED_ARC5: in gaudi2_is_arc_enabled()5755 case CPU_ID_SCHED_ARC0 ... CPU_ID_SCHED_ARC5: in gaudi2_clr_arc_id_cap()5778 case CPU_ID_SCHED_ARC0 ... CPU_ID_SCHED_ARC5: in gaudi2_set_arc_id_cap()