Searched refs:CPG_PL5_SDIV_DIV_DSI_B_WEN (Results 1 – 2 of 2) sorted by relevance
44 #define CPG_PL5_SDIV_DIV_DSI_B_WEN BIT(24) macro
376 writel(CPG_PL5_SDIV_DIV_DSI_A_WEN | CPG_PL5_SDIV_DIV_DSI_B_WEN | in rzg2l_cpg_dsi_div_set_rate()
