Searched refs:CORE_LANE_CTL (Results 1 – 1 of 1) sorted by relevance
49 #define CORE_LANE_CTL(port) (0x84004 + 0x4000 * (port)) macro477 rmw_set(CORE_LANE_CTL_CFGACC, pcie->base + CORE_LANE_CTL(port->idx)); in apple_pcie_setup_refclk()494 rmw_clear(CORE_LANE_CTL_CFGACC, pcie->base + CORE_LANE_CTL(port->idx)); in apple_pcie_setup_refclk()
