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Searched refs:CLK_TOP_TL_SEL (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.1/include/dt-bindings/clock/
Dmt8192-clk.h53 #define CLK_TOP_TL_SEL 41 macro
/Linux-v6.1/drivers/clk/mediatek/
Dclk-mt8192.c649 MUX_GATE_CLR_SET_UPD(CLK_TOP_TL_SEL, "tl_sel",
/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt8192.dtsi911 assigned-clocks = <&topckgen CLK_TOP_TL_SEL>;