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Searched refs:CLK_TOP_SPISLV_SEL (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.1/include/dt-bindings/clock/
Dmt2712-clk.h188 #define CLK_TOP_SPISLV_SEL 157 macro
/Linux-v6.1/drivers/clk/mediatek/
Dclk-mt2712.c869 MUX_GATE(CLK_TOP_SPISLV_SEL, "spislv_sel",
/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi321 assigned-clocks = <&topckgen CLK_TOP_SPISLV_SEL>;