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Searched refs:CLK_TOP_MSDC50_0 (Results 1 – 10 of 10) sorted by relevance

/Linux-v6.1/include/dt-bindings/clock/
Dmt6765-clk.h95 #define CLK_TOP_MSDC50_0 60 macro
Dmt6779-clk.h19 #define CLK_TOP_MSDC50_0 9 macro
Dmt8186-clk.h32 #define CLK_TOP_MSDC50_0 13 macro
Dmt8195-clk.h42 #define CLK_TOP_MSDC50_0 30 macro
/Linux-v6.1/drivers/clk/mediatek/
Dclk-mt8186-topckgen.c536 MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC50_0, "top_msdc50_0",
Dclk-mt8195-topckgen.c931 MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC50_0, "top_msdc50_0",
Dclk-mt6779.c693 MUX_GATE_CLR_SET_UPD(CLK_TOP_MSDC50_0, "msdc50_0_sel",
Dclk-mt6765.c143 FACTOR(CLK_TOP_MSDC50_0, "msdc50_0_ck", "msdc50_0_sel", 1, 1),
/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt8186.dtsi664 clocks = <&topckgen CLK_TOP_MSDC50_0>,
669 assigned-clocks = <&topckgen CLK_TOP_MSDC50_0>;
Dmt8195.dtsi1076 clocks = <&topckgen CLK_TOP_MSDC50_0>,