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Searched refs:CLK_TOP_MFG_PLL_SEL (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.1/drivers/clk/mediatek/
Dclk-mt8192.c588 MUX_CLR_SET_UPD(CLK_TOP_MFG_PLL_SEL, "mfg_pll_sel",
1082 if (top_mtk_muxes[i].id == CLK_TOP_MFG_PLL_SEL) in clk_mt8192_reg_mfg_mux_notifier()
1117 top_clk_data->hws[CLK_TOP_MFG_PLL_SEL]->clk); in clk_mt8192_top_probe()
/Linux-v6.1/include/dt-bindings/clock/
Dmt8192-clk.h26 #define CLK_TOP_MFG_PLL_SEL 14 macro
/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt8192.dtsi350 clocks = <&topckgen CLK_TOP_MFG_PLL_SEL>;