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Searched refs:CLK_TOP_F26M_SEL (Results 1 – 3 of 3) sorted by relevance

/Linux-v6.1/drivers/clk/mediatek/
Dclk-mt7986-topckgen.c255 MUX_GATE_CLR_SET_UPD(CLK_TOP_F26M_SEL, "csw_f26m_sel",
313 clk_prepare_enable(clk_data->hws[CLK_TOP_F26M_SEL]->clk); in clk_mt7986_topckgen_probe()
/Linux-v6.1/include/dt-bindings/clock/
Dmt7986-clk.h77 #define CLK_TOP_F26M_SEL 54 macro
/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt7986a.dtsi204 assigned-clock-parents = <&topckgen CLK_TOP_F26M_SEL>;
217 assigned-clock-parents = <&topckgen CLK_TOP_F26M_SEL>;