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Searched refs:CLK_TOP_DRAMC_SEL (Results 1 – 2 of 2) sorted by relevance

/Linux-v6.1/drivers/clk/mediatek/
Dclk-mt7986-topckgen.c205 MUX_GATE_CLR_SET_UPD(CLK_TOP_DRAMC_SEL, "dramc_sel", f_26m_adc_parents,
311 clk_prepare_enable(clk_data->hws[CLK_TOP_DRAMC_SEL]->clk); in clk_mt7986_topckgen_probe()
/Linux-v6.1/include/dt-bindings/clock/
Dmt7986-clk.h60 #define CLK_TOP_DRAMC_SEL 37 macro