Searched refs:CLK_TOP_ARMPLL_DIV_PLL1 (Results 1 – 3 of 3) sorted by relevance
286 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;335 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;351 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;367 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;383 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;399 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;415 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;431 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;447 <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>;
165 #define CLK_TOP_ARMPLL_DIV_PLL1 129 macro
760 GATE_TOP(CLK_TOP_ARMPLL_DIV_PLL1, "armpll_div_pll1", "mainpll", 4),