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Searched refs:CLK_MM_SMI_LARB0 (Results 1 – 24 of 24) sorted by relevance

/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt8167.dtsi147 clocks = <&mmsys CLK_MM_SMI_LARB0>,
148 <&mmsys CLK_MM_SMI_LARB0>;
Dmt2712e.dtsi1006 clocks = <&mmsys CLK_MM_SMI_LARB0>,
1007 <&mmsys CLK_MM_SMI_LARB0>;
Dmt8183.dtsi826 <&mmsys CLK_MM_SMI_LARB0>,
1882 clocks = <&mmsys CLK_MM_SMI_LARB0>,
1883 <&mmsys CLK_MM_SMI_LARB0>;
Dmt8173.dtsi1287 clocks = <&mmsys CLK_MM_SMI_LARB0>,
1288 <&mmsys CLK_MM_SMI_LARB0>;
/Linux-v6.1/drivers/clk/mediatek/
Dclk-mt6765-mm.c52 GATE_MM(CLK_MM_SMI_LARB0, "mm_smi_larb0", "mm_ck", 20),
Dclk-mt8183-mm.c37 GATE_MM0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 1),
Dclk-mt2701-mm.c47 GATE_DISP0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 1),
Dclk-mt6779-mm.c37 GATE_MM0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 1),
Dclk-mt6797-mm.c46 GATE_MM0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 1),
Dclk-mt8167-mm.c53 GATE_MM0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "smi_mm", 1),
Dclk-mt6795-mm.c34 GATE_MM0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 1),
Dclk-mt8173-mm.c49 GATE_MM0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 1),
Dclk-mt2712-mm.c63 GATE_MM0(CLK_MM_SMI_LARB0, "mm_smi_larb0", "mm_sel", 1),
/Linux-v6.1/include/dt-bindings/clock/
Dmt8167-clk.h80 #define CLK_MM_SMI_LARB0 1 macro
Dmediatek,mt6795-clk.h220 #define CLK_MM_SMI_LARB0 1 macro
Dmt6797-clk.h216 #define CLK_MM_SMI_LARB0 2 macro
Dmt6765-clk.h271 #define CLK_MM_SMI_LARB0 20 macro
Dmt8173-clk.h249 #define CLK_MM_SMI_LARB0 2 macro
Dmt2712-clk.h302 #define CLK_MM_SMI_LARB0 1 macro
Dmt6779-clk.h342 #define CLK_MM_SMI_LARB0 2 macro
Dmt8183-clk.h310 #define CLK_MM_SMI_LARB0 1 macro
Dmt2701-clk.h354 #define CLK_MM_SMI_LARB0 2 macro
/Linux-v6.1/arch/arm/boot/dts/
Dmt7623n.dtsi65 clocks = <&mmsys CLK_MM_SMI_LARB0>,
66 <&mmsys CLK_MM_SMI_LARB0>;
Dmt2701.dtsi535 clocks = <&mmsys CLK_MM_SMI_LARB0>,
536 <&mmsys CLK_MM_SMI_LARB0>;