Searched refs:CLK_MM_DISP_SPLIT0 (Results 1 – 7 of 7) sorted by relevance
| /Linux-v6.1/drivers/clk/mediatek/ |
| D | clk-mt6795-mm.c | 61 GATE_MM0(CLK_MM_DISP_SPLIT0, "mm_disp_split0", "mm_sel", 28),
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| D | clk-mt8173-mm.c | 75 GATE_MM0(CLK_MM_DISP_SPLIT0, "mm_disp_split0", "mm_sel", 28),
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| D | clk-mt2712-mm.c | 90 GATE_MM0(CLK_MM_DISP_SPLIT0, "mm_disp_split0", "mm_sel", 28),
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| /Linux-v6.1/include/dt-bindings/clock/ |
| D | mediatek,mt6795-clk.h | 247 #define CLK_MM_DISP_SPLIT0 28 macro
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| D | mt8173-clk.h | 275 #define CLK_MM_DISP_SPLIT0 28 macro
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| D | mt2712-clk.h | 329 #define CLK_MM_DISP_SPLIT0 28 macro
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| /Linux-v6.1/arch/arm64/boot/dts/mediatek/ |
| D | mt8173.dtsi | 1183 clocks = <&mmsys CLK_MM_DISP_SPLIT0>;
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