Searched refs:CLK_ENABLE (Results 1 – 4 of 4) sorted by relevance
64 #define CLK_ENABLE (1 << 24) /* 1: output mmc clock */ macro155 CLK_ENABLE | CLKDIV_4 | SRSPTO_256 | in sh_mmcif_boot_do_read()188 CLK_ENABLE | CLKDIV_256 | SRSPTO_256 | in sh_mmcif_boot_init()
40 #define CLK_ENABLE BIT(0) macro443 bridge->r.clk_lane_reg1 |= (polarities[0] << 1) | CLK_ENABLE; in mipid02_configure_clk_lane()
489 sh_mmcif_bitclr(host, MMCIF_CE_CLK_CTRL, CLK_ENABLE); in sh_mmcif_clock_control()535 sh_mmcif_bitset(host, MMCIF_CE_CLK_CTRL, CLK_ENABLE); in sh_mmcif_clock_control()
967 DUMPREG(CLK_ENABLE); in vpe_dump_regs()
