Searched refs:BACKLIGHT_DUTY_CYCLE_MASK (Results 1 – 7 of 7) sorted by relevance
188 blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK; in psb_intel_lvds_set_backlight()197 ~BACKLIGHT_DUTY_CYCLE_MASK; in psb_intel_lvds_set_backlight()271 BACKLIGHT_DUTY_CYCLE_MASK); in psb_intel_lvds_save()433 BACKLIGHT_DUTY_CYCLE_MASK); in psb_intel_lvds_prepare()
89 REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; in cdv_intel_lvds_set_backlight()96 ~BACKLIGHT_DUTY_CYCLE_MASK; in cdv_intel_lvds_set_backlight()238 BACKLIGHT_DUTY_CYCLE_MASK); in cdv_intel_lvds_prepare()
93 u32 val = REG_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; in cdv_get_brightness()123 blc_pwm_ctl = REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; in cdv_set_brightness()
168 BACKLIGHT_DUTY_CYCLE_MASK); in oaktrail_lvds_prepare()
104 #define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) macro
68 #define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) macro
145 return intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; in lpt_get_backlight()152 return intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; in pch_get_backlight()161 val = intel_de_read(dev_priv, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; in i9xx_get_backlight()182 return intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; in vlv_get_backlight()208 u32 val = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; in lpt_set_backlight()218 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; in pch_set_backlight()240 mask = BACKLIGHT_DUTY_CYCLE_MASK; in i9xx_set_backlight()257 tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; in vlv_set_backlight()
