Searched refs:APR (Results 1 – 4 of 4) sorted by relevance
224 tristate "Qualcomm APR/GPR Bus (Asynchronous/Generic Packet Router)"230 Enable APR IPC protocol support between231 application processor and QDSP6. APR is
68 APR, enumerator
90 [APR] = 0x0554,165 [APR] = 0x0354,213 [APR] = 0x0154,299 [APR] = 0x01b8,1526 sh_eth_write(ndev, 1, APR); in sh_eth_dev_init()2139 add_reg(APR); in __sh_eth_get_regs()
98 guest. This interface always exposes four register APR[0-3] describing the
