Searched refs:AMDGPU_IRQ_STATE_DISABLE (Results 1 – 25 of 27) sorted by relevance
12
42 AMDGPU_IRQ_STATE_DISABLE, enumerator
165 AMDGPU_IRQ_STATE_DISABLE); in amdgpu_irq_disable_all()565 state = AMDGPU_IRQ_STATE_DISABLE; in amdgpu_irq_update()
599 case AMDGPU_IRQ_STATE_DISABLE: in si_dma_set_trap_irq_state()615 case AMDGPU_IRQ_STATE_DISABLE: in si_dma_set_trap_irq_state()
1013 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v2_4_set_trap_irq_state()1029 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v2_4_set_trap_irq_state()
190 amdgpu_crtc->vsync_timer_enabled = AMDGPU_IRQ_STATE_DISABLE; in amdgpu_vkms_crtc_init()
1118 case AMDGPU_IRQ_STATE_DISABLE: in cik_sdma_set_trap_irq_state()1134 case AMDGPU_IRQ_STATE_DISABLE: in cik_sdma_set_trap_irq_state()
1347 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v3_0_set_trap_irq_state()1363 case AMDGPU_IRQ_STATE_DISABLE: in sdma_v3_0_set_trap_irq_state()
429 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v9_0_ecc_interrupt_state()481 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v9_0_vm_fault_interrupt_state()
2908 case AMDGPU_IRQ_STATE_DISABLE: in dce_v8_0_set_crtc_vblank_interrupt_state()2959 case AMDGPU_IRQ_STATE_DISABLE: in dce_v8_0_set_crtc_vline_interrupt_state()2987 case AMDGPU_IRQ_STATE_DISABLE: in dce_v8_0_set_hpd_interrupt_state()3102 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v8_0_set_pageflip_interrupt_state()
1046 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v6_0_vm_fault_interrupt_state()
63 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v11_0_vm_fault_interrupt_state()
2992 case AMDGPU_IRQ_STATE_DISABLE: in dce_v10_0_set_crtc_vblank_interrupt_state()3021 case AMDGPU_IRQ_STATE_DISABLE: in dce_v10_0_set_crtc_vline_interrupt_state()3051 case AMDGPU_IRQ_STATE_DISABLE: in dce_v10_0_set_hpd_irq_state()3129 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v10_0_set_pageflip_irq_state()
3217 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_gfx_eop_interrupt_state()3238 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_compute_eop_interrupt_state()3280 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_priv_reg_fault_state()3305 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v6_0_set_priv_inst_fault_state()
3115 case AMDGPU_IRQ_STATE_DISABLE: in dce_v11_0_set_crtc_vblank_interrupt_state()3144 case AMDGPU_IRQ_STATE_DISABLE: in dce_v11_0_set_crtc_vline_interrupt_state()3174 case AMDGPU_IRQ_STATE_DISABLE: in dce_v11_0_set_hpd_irq_state()3252 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v11_0_set_pageflip_irq_state()
77 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v10_0_vm_fault_interrupt_state()
2859 case AMDGPU_IRQ_STATE_DISABLE: in dce_v6_0_set_crtc_vblank_interrupt_state()2894 case AMDGPU_IRQ_STATE_DISABLE: in dce_v6_0_set_hpd_interrupt_state()3009 if (state == AMDGPU_IRQ_STATE_DISABLE) in dce_v6_0_set_pageflip_interrupt_state()
4699 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_gfx_eop_interrupt_state()4750 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_compute_eop_interrupt_state()4773 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_priv_reg_fault_state()4798 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v7_0_set_priv_inst_fault_state()
6439 state == AMDGPU_IRQ_STATE_DISABLE ? 0 : 1); in gfx_v8_0_set_gfx_eop_interrupt_state()6478 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v8_0_set_compute_eop_interrupt_state()6499 state == AMDGPU_IRQ_STATE_DISABLE ? 0 : 1); in gfx_v8_0_set_priv_reg_fault_state()6510 state == AMDGPU_IRQ_STATE_DISABLE ? 0 : 1); in gfx_v8_0_set_priv_inst_fault_state()6562 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v8_0_set_cp_ecc_int_state()6607 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v8_0_set_sq_int_state()
1243 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v7_0_vm_fault_interrupt_state()
5718 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v11_0_set_gfx_eop_interrupt_state()5775 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v11_0_set_compute_eop_interrupt_state()5887 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v11_0_set_priv_reg_fault_state()5906 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v11_0_set_priv_inst_fault_state()5986 if (state == AMDGPU_IRQ_STATE_DISABLE) {
5518 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_gfx_eop_interrupt_state()5565 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_compute_eop_interrupt_state()5588 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_priv_reg_fault_state()5607 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_priv_inst_fault_state()5634 case AMDGPU_IRQ_STATE_DISABLE: in gfx_v9_0_set_cp_ecc_error_state()
1411 case AMDGPU_IRQ_STATE_DISABLE: in gmc_v8_0_vm_fault_interrupt_state()
3137 case AMDGPU_IRQ_STATE_DISABLE: in kv_dpm_set_interrupt_state()3154 case AMDGPU_IRQ_STATE_DISABLE: in kv_dpm_set_interrupt_state()
1364 case AMDGPU_IRQ_STATE_DISABLE: in smu_v11_0_set_irq_state()
1300 case AMDGPU_IRQ_STATE_DISABLE: in smu_v13_0_set_irq_state()