Home
last modified time | relevance | path

Searched refs:ADF_CSR_WR (Results 1 – 15 of 15) sorted by relevance

/Linux-v6.1/drivers/crypto/qat/qat_common/
Dadf_gen2_hw_data.h41 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
48 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
50 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
55 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
58 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
61 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
65 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
67 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
71 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
74 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * (bank)) + \
[all …]
Dadf_gen4_hw_data.h40 ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
52 ADF_CSR_WR((_csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
55 ADF_CSR_WR((_csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
61 ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
65 ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
69 ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
73 ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
77 ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
81 ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
86 ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET, \
[all …]
Dadf_gen4_pfvf.c45 ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, val); in adf_gen4_enable_vf2pf_interrupts()
50 ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, ADF_GEN4_VF_MSK); in adf_gen4_disable_all_vf2pf_interrupts()
77 ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, ADF_GEN4_VF_MSK); in adf_gen4_disable_pending_vf2pf_interrupts()
78 ADF_CSR_WR(pmisc_addr, ADF_4XXX_VM2PF_MSK, disabled | sources); in adf_gen4_disable_pending_vf2pf_interrupts()
98 ADF_CSR_WR(pmisc_addr, pfvf_offset, csr_val | ADF_PFVF_INT); in adf_gen4_pfvf_send()
130 ADF_CSR_WR(pmisc_addr, pfvf_offset, csr_val & ~ADF_PFVF_INT); in adf_gen4_pfvf_recv()
Dadf_gen4_pm.c36 ADF_CSR_WR(pmisc, ADF_GEN4_PM_HOST_MSG, msg); in send_host_msg()
64 ADF_CSR_WR(pmisc, ADF_GEN4_PM_INTERRUPT, pm_int_sts); in pm_bh_handler()
69 ADF_CSR_WR(pmisc, ADF_GEN4_ERRMSK2, val); in pm_bh_handler()
94 ADF_CSR_WR(pmisc, ADF_GEN4_ERRMSK2, val); in adf_gen4_handle_pm_interrupt()
128 ADF_CSR_WR(pmisc, ADF_GEN4_PM_INTERRUPT, val); in adf_gen4_enable_pm()
133 ADF_CSR_WR(pmisc, ADF_GEN4_ERRMSK2, val); in adf_gen4_enable_pm()
Dadf_gen2_hw_data.c38 ADF_CSR_WR(pmisc_addr, ADF_GEN2_AE_CTX_ENABLES(i), val); in adf_gen2_enable_error_correction()
41 ADF_CSR_WR(pmisc_addr, ADF_GEN2_AE_MISC_CONTROL(i), val); in adf_gen2_enable_error_correction()
48 ADF_CSR_WR(pmisc_addr, ADF_GEN2_UERRSSMSH(i), val); in adf_gen2_enable_error_correction()
51 ADF_CSR_WR(pmisc_addr, ADF_GEN2_CERRSSMSH(i), val); in adf_gen2_enable_error_correction()
109 ADF_CSR_WR(addr, ADF_GEN2_SMIAPF0_MASK_OFFSET, val); in adf_gen2_enable_ints()
110 ADF_CSR_WR(addr, ADF_GEN2_SMIAPF1_MASK_OFFSET, ADF_GEN2_SMIA1_MASK); in adf_gen2_enable_ints()
263 ADF_CSR_WR(pmisc_addr, ADF_SSMWDT(i), timer_val); in adf_gen2_set_ssm_wdtimer()
265 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTPKE(i), timer_val_pke); in adf_gen2_set_ssm_wdtimer()
Dadf_gen4_hw_data.c130 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTL_OFFSET, ssm_wdt_low); in adf_gen4_set_ssm_wdtimer()
131 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTH_OFFSET, ssm_wdt_high); in adf_gen4_set_ssm_wdtimer()
133 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTPKEL_OFFSET, ssm_wdt_pke_low); in adf_gen4_set_ssm_wdtimer()
134 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTPKEH_OFFSET, ssm_wdt_pke_high); in adf_gen4_set_ssm_wdtimer()
153 ADF_CSR_WR(csr, ADF_WQM_CSR_RPRESETCTL(bank_number), in reset_ring_pair()
164 ADF_CSR_WR(csr, ADF_WQM_CSR_RPRESETSTS(bank_number), in reset_ring_pair()
Dicp_qat_hal.h126 ADF_CSR_WR((handle)->hal_cap_g_ctl_csr_addr_v, csr, val)
133 ADF_CSR_WR(AE_CSR_ADDR(handle, ae, csr), 0, val)
140 ADF_CSR_WR(AE_XFER_ADDR(handle, ae, reg), 0, val)
142 ADF_CSR_WR((handle)->hal_sram_addr_v, addr, val)
Dadf_gen2_pfvf.c60 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); in adf_gen2_enable_vf2pf_interrupts()
69 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); in adf_gen2_disable_all_vf2pf_interrupts()
101 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3); in adf_gen2_disable_pending_vf2pf_interrupts()
104 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3); in adf_gen2_disable_pending_vf2pf_interrupts()
222 ADF_CSR_WR(pmisc_addr, pfvf_offset, csr_msg | int_bit); in adf_gen2_pfvf_send()
253 ADF_CSR_WR(pmisc_addr, pfvf_offset, csr_val); in adf_gen2_pfvf_send()
317 ADF_CSR_WR(pmisc_addr, pfvf_offset, csr_val); in adf_gen2_pfvf_recv()
Dadf_hw_arbiter.c11 ADF_CSR_WR(csr_addr, (arb_offset) + \
15 ADF_CSR_WR(csr_addr, ((arb_offset) + (wt_offset)) + \
Dadf_admin.c128 ADF_CSR_WR(mailbox, mb_offset, 1); in adf_put_admin_msg_sync()
334 ADF_CSR_WR(pmisc_addr, adminmsg_u, upper_32_bits(reg_val)); in adf_init_admin_comms()
335 ADF_CSR_WR(pmisc_addr, adminmsg_l, lower_32_bits(reg_val)); in adf_init_admin_comms()
Dadf_vf_isr.c35 ADF_CSR_WR(pmisc_addr, ADF_VINTMSK_OFFSET, 0x0); in adf_enable_pf2vf_interrupts()
42 ADF_CSR_WR(pmisc_addr, ADF_VINTMSK_OFFSET, 0x2); in adf_disable_pf2vf_interrupts()
Dadf_accel_devices.h228 #define ADF_CSR_WR(csr_base, csr_offset, val) \ macro
Dqat_hal.c459 ADF_CSR_WR(csr_addr, 0, csr_val); in qat_hal_init_esram()
/Linux-v6.1/drivers/crypto/qat/qat_dh895xcc/
Dadf_dh895xcc_hw_data.c118 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); in enable_vf2pf_interrupts()
125 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, val); in enable_vf2pf_interrupts()
136 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, val); in disable_all_vf2pf_interrupts()
141 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, val); in disable_all_vf2pf_interrupts()
180 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3); in disable_pending_vf2pf_interrupts()
181 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, errmsk5); in disable_pending_vf2pf_interrupts()
185 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK3, errmsk3); in disable_pending_vf2pf_interrupts()
186 ADF_CSR_WR(pmisc_addr, ADF_GEN2_ERRMSK5, errmsk5); in disable_pending_vf2pf_interrupts()
/Linux-v6.1/drivers/crypto/qat/qat_4xxx/
Dadf_4xxx_hw_data.c134 ADF_CSR_WR(csr, ADF_4XXX_MSIX_RTTABLE_OFFSET(i), i); in set_msix_default_rttable()
233 ADF_CSR_WR(csr, ADF_GEN4_ERRMSK3, ADF_GEN4_VFLNOTIFY); in adf_enable_error_correction()
243 ADF_CSR_WR(addr, ADF_4XXX_SMIAPF_RP_X0_MASK_OFFSET, 0); in adf_enable_ints()
244 ADF_CSR_WR(addr, ADF_4XXX_SMIAPF_RP_X1_MASK_OFFSET, 0); in adf_enable_ints()
247 ADF_CSR_WR(addr, ADF_4XXX_SMIAPF_MASK_OFFSET, 0); in adf_enable_ints()
262 ADF_CSR_WR(addr, ADF_GEN4_ERRMSK2, csr); in adf_init_device()
265 ADF_CSR_WR(addr, ADF_GEN4_PM_INTERRUPT, ADF_GEN4_PM_DRV_ACTIVE); in adf_init_device()