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Searched refs:zx_writel_mask (Results 1 – 4 of 4) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/zte/
Dzx_vou.c229 zx_writel_mask(vou->vouctl + VOU_INF_HDMI_CTRL, VOU_HDMI_AUD_MASK, aud); in vou_inf_hdmi_audio_sel()
244 zx_writel_mask(csc + CSC_CTRL0, CSC_COV_MODE_MASK, in vou_inf_enable()
246 zx_writel_mask(csc + CSC_CTRL0, CSC_WORK_ENABLE, in vou_inf_enable()
250 zx_writel_mask(dither + OSD_DITHER_CTRL0, DITHER_BYSPASS, in vou_inf_enable()
253 zx_writel_mask(csc + CSC_CTRL0, CSC_WORK_ENABLE, 0); in vou_inf_enable()
254 zx_writel_mask(dither + OSD_DITHER_CTRL0, DITHER_BYSPASS, 0); in vou_inf_enable()
258 zx_writel_mask(vou->vouctl + VOU_INF_DATA_SEL, 0x3 << data_sel_shift, in vou_inf_enable()
262 zx_writel_mask(vou->vouctl + VOU_INF_CH_SEL, 0x1 << id, in vou_inf_enable()
266 zx_writel_mask(vou->vouctl + VOU_CLK_SEL, inf->clocks_sel_bits, in vou_inf_enable()
270 zx_writel_mask(vou->vouctl + VOU_CLK_EN, inf->clocks_en_bits, in vou_inf_enable()
[all …]
Dzx_plane.c105 zx_writel_mask(layer + VL_CTRL0, VL_UPDATE, VL_UPDATE); in zx_vl_set_update()
162 zx_writel_mask(rsz + RSZ_VL_CTRL_CFG, RSZ_VL_FMT_MASK, fmt); in zx_vl_rsz_setup()
246 zx_writel_mask(layer + VL_CTRL2, VL_SCALER_BYPASS_MODE, in zx_vl_plane_atomic_update()
252 zx_writel_mask(hbsc + HBSC_CTRL0, HBSC_CTRL_EN, HBSC_CTRL_EN); in zx_vl_plane_atomic_update()
268 zx_writel_mask(hbsc + HBSC_CTRL0, HBSC_CTRL_EN, 0); in zx_plane_atomic_disable()
330 zx_writel_mask(layer + GL_CTRL0, GL_UPDATE, GL_UPDATE); in zx_gl_set_update()
405 zx_writel_mask(layer + GL_CTRL1, GL_DATA_FMT_MASK, in zx_gl_plane_atomic_update()
409 zx_writel_mask(layer + GL_CTRL2, GL_GLOBAL_ALPHA_MASK, in zx_gl_plane_atomic_update()
414 zx_writel_mask(csc + CSC_CTRL0, CSC_COV_MODE_MASK, in zx_gl_plane_atomic_update()
417 zx_writel_mask(csc + CSC_CTRL0, CSC_COV_MODE_MASK, in zx_gl_plane_atomic_update()
[all …]
Dzx_vga.c230 zx_writel_mask(vga->mmio + VGA_CMD_CFG, VGA_CMD_COMBO, VGA_CMD_COMBO); in zx_vga_i2c_read()
231 zx_writel_mask(vga->mmio + VGA_CMD_CFG, VGA_CMD_RW, 0); in zx_vga_i2c_read()
237 zx_writel_mask(vga->mmio + VGA_RXF_CTRL, VGA_RX_FIFO_CLEAR, in zx_vga_i2c_read()
244 zx_writel_mask(vga->mmio + VGA_CMD_CFG, VGA_CMD_TRANS, in zx_vga_i2c_read()
370 zx_writel_mask(vga->mmio + VGA_I2C_STATUS, VGA_CLEAR_IRQ, in zx_vga_irq_handler()
420 zx_writel_mask(vga->mmio + VGA_CMD_CFG, VGA_CMD_TRANS, VGA_CMD_TRANS); in zx_vga_hw_init()
Dzx_drm_drv.h25 static inline void zx_writel_mask(void __iomem *reg, u32 mask, u32 val) in zx_writel_mask() function