Searched refs:wrpll (Results 1 – 6 of 6) sorted by relevance
3 obj-$(CONFIG_CLK_ANALOGBITS_WRPLL_CLN28HPC) += wrpll-cln28hpc.o
176 u32 wrpll; member
506 I915_WRITE(WRPLL_CTL(id), pll->state.hw_state.wrpll); in hsw_ddi_wrpll_enable()569 hw_state->wrpll = val; in hsw_ddi_wrpll_get_hw_state()828 crtc_state->dpll_hw_state.wrpll = val; in hsw_ddi_hdmi_get_dpll()915 hw_state->wrpll, hw_state->spll); in hsw_dump_hw_state()2465 struct skl_wrpll_params wrpll; member2551 *pll_params = params[i].wrpll; in icl_calc_dp_combo_pll()
1233 u32 wrpll; in hsw_ddi_calc_wrpll_link() local1235 wrpll = I915_READ(reg); in hsw_ddi_calc_wrpll_link()1236 switch (wrpll & WRPLL_REF_MASK) { in hsw_ddi_calc_wrpll_link()1263 MISSING_CASE(wrpll); in hsw_ddi_calc_wrpll_link()1267 r = wrpll & WRPLL_DIVIDER_REF_MASK; in hsw_ddi_calc_wrpll_link()1268 p = (wrpll & WRPLL_DIVIDER_POST_MASK) >> WRPLL_DIVIDER_POST_SHIFT; in hsw_ddi_calc_wrpll_link()1269 n = (wrpll & WRPLL_DIVIDER_FB_MASK) >> WRPLL_DIVIDER_FB_SHIFT; in hsw_ddi_calc_wrpll_link()
12799 PIPE_CONF_CHECK_X(dpll_hw_state.wrpll); in intel_pipe_config_compare()
2844 seq_printf(m, " wrpll: 0x%08x\n", pll->state.hw_state.wrpll); in i915_shared_dplls_info()
