Searched refs:writer_wm_sets (Results 1 – 5 of 5) sorted by relevance
574 if (ranges->writer_wm_sets[i].wm_inst > 3) in pp_rv_set_wm_ranges()578 ranges->writer_wm_sets[i].wm_inst; in pp_rv_set_wm_ranges()580 ranges->writer_wm_sets[i].max_fill_clk_mhz * 1000; in pp_rv_set_wm_ranges()582 ranges->writer_wm_sets[i].min_fill_clk_mhz * 1000; in pp_rv_set_wm_ranges()584 ranges->writer_wm_sets[i].max_drain_clk_mhz * 1000; in pp_rv_set_wm_ranges()586 ranges->writer_wm_sets[i].min_drain_clk_mhz * 1000; in pp_rv_set_wm_ranges()696 if (ranges->writer_wm_sets[i].wm_inst > 3) in pp_nv_set_wm_ranges()700 ranges->writer_wm_sets[i].wm_inst; in pp_nv_set_wm_ranges()702 ranges->writer_wm_sets[i].max_fill_clk_mhz * 1000; in pp_nv_set_wm_ranges()704 ranges->writer_wm_sets[i].min_fill_clk_mhz * 1000; in pp_nv_set_wm_ranges()[all …]
457 ranges->writer_wm_sets[0].wm_inst = WM_A; in build_watermark_ranges()458 ranges->writer_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in build_watermark_ranges()459 ranges->writer_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in build_watermark_ranges()460 ranges->writer_wm_sets[0].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in build_watermark_ranges()461 ranges->writer_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in build_watermark_ranges()
1520 ranges.writer_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()1521 ranges.writer_wm_sets[0].min_fill_clk_mhz = socclk_khz / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1522 ranges.writer_wm_sets[0].max_fill_clk_mhz = overdrive / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1523 ranges.writer_wm_sets[0].min_drain_clk_mhz = min_fclk_khz / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1524 ranges.writer_wm_sets[0].max_drain_clk_mhz = overdrive / 1000; in dcn_bw_notify_pplib_of_wm_ranges()1532 ranges.writer_wm_sets[0].wm_inst = WM_A; in dcn_bw_notify_pplib_of_wm_ranges()1533 ranges.writer_wm_sets[0].min_fill_clk_mhz = 200; in dcn_bw_notify_pplib_of_wm_ranges()1534 ranges.writer_wm_sets[0].max_fill_clk_mhz = 5000; in dcn_bw_notify_pplib_of_wm_ranges()1535 ranges.writer_wm_sets[0].min_drain_clk_mhz = 800; in dcn_bw_notify_pplib_of_wm_ranges()1536 ranges.writer_wm_sets[0].max_drain_clk_mhz = 5000; in dcn_bw_notify_pplib_of_wm_ranges()[all …]
99 struct pp_smu_wm_set_range writer_wm_sets[MAX_WATERMARK_SETS]; member
3477 ranges.writer_wm_sets[0].wm_inst = 0; in construct()3478 ranges.writer_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in construct()3479 ranges.writer_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in construct()3480 ranges.writer_wm_sets[0].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in construct()3481 ranges.writer_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in construct()
